Journal of electrical engineering and technology: where computers in engineering meet real systems
The journal of electrical engineering and technology is a natural home for cross‑disciplinary work at the nexus of power, control, and software. At IJCSE, we welcome engineering and computers research that transforms components into resilient systems—tested, transparent, and ready for adoption.
Transparent policies, predictable timelines, and open access options aligned to modern engineering practice.
Computers in engineering: integrating hardware, firmware, and software
Computers in engineering research shines when algorithms are proven on real hardware, with constraints like thermal budgets, EMI, latency ceilings, and hard safety limits. Successful papers document assumptions, operating envelopes, and fallback modes that keep systems safe under load.
For engineering and computers projects, reviewers value disciplined experimentation: deterministic tests, repeatable conditions, and honest trade‑offs. Clear replication details encourage downstream adoption across labs and industry partners.
Author promise: If your contribution improves reliability, efficiency, or safety in a measurable way, the journal of electrical engineering and technology audience will recognize its value.
Embedded systems integration: timing, power, and software concurrency matter.
Representative scopes at the engineering and computers interface
Power & control applications
Grid integration, converters, storage systems, MPC, and robust control. Emphasis on fault response, harmonic mitigation, and measurable energy savings.
Focus: Stability under rapid transients
Evidence: HIL or real‑plant validation
Artifacts: Controller configs, tuning ranges
Embedded & real‑time software
Scheduling, RTOS design, memory‑safe drivers, mixed‑criticality systems. Determinism and failure isolation are central to claims.
Focus: Latency and jitter budgets
Evidence: Benchmarks plus stress tests
Artifacts: Build scripts, configs, seeds
Signals, sensing, and diagnostics
Condition monitoring, fault detection, parameter estimation, and resilient sensing pipelines. Transparent data quality and labeling strategy encouraged.
Writing blueprint for engineering and computers submissions
Open with the bottleneck you remove—e.g., switching losses, PLC latency, firmware race conditions, or sensor drift. State constraints like thermal headroom, EMI regulations, and safety margins. Then explain how your design decisions address these realities.
Use baselines your field trusts. When deviating, justify clearly. Provide ablations that reveal where improvements originate (control law change, algorithmic simplification, or hardware topology). Conclude with deployment notes: integration steps, monitoring hooks, and rollback plan.
Utility‑scale systems: smart grids, SCADA, distributed control, and protective relays benefit from rigorous reporting.
Preparing for reviewers: clarity, safety, and reproducibility
Reviewers prioritize verifiable evidence. Provide seed values, build flags, PCB revisions, sensor specs, and test scripts. Document environmental factors like ambient temperature and supply ripple. Share limitations to prevent misapplication.
Cite standards and regulations where applicable (EMC, safety, grid codes). When publishing firmware, include versioning and a minimal test harness. These choices speed review and help practitioners rebuild your results faithfully.
Findability tips: Use precise component names, control modes, and task keywords—e.g., “sensorless FOC inverter,” “SVPWM,” “droop control,” “IEC 61850 telemetry”—in titles, abstracts, and figure captions.
Prototype early, test broadly: firmware loops, noise immunity, watchdogs, and brownout behavior.
Search‑intent phrases engineers actually use
Engineers looking for the journal of electrical engineering and technology often search variations like “computers in engineering research articles,” “engineering and computers applications for smart grids,” and “real‑time control systems journal.” When these phrases match your work, integrate them naturally into headings, abstracts, and captions.
Adjacent phrases that improve discovery include “embedded control for power electronics,” “condition monitoring with edge AI,” and “real‑time Ethernet for industrial automation.” Used sparingly and contextually, they guide the right readers to the right results.
From idea to acceptance in the journal of electrical engineering and technology
1
Scoping
Define the bottleneck: switching losses, PCB heat, scheduler jitter, or sensor dropout. State who benefits (utility ops, factory controls, EV systems) and the decision your method enables.
2
Preparation
Align structure to evaluation. Include deterministic tests, conservative margins, and ablations to isolate sources of improvement. Document standards and compliance assumptions.
3
Submission
Use a cover letter that positions your contribution for the journal’s engineering and computers readership. Provide artifacts or detailed surrogates for reproduction.
4
Review
Respond with data: new tests, error bars, stress edges. If scope must narrow, say so and tighten claims. Precision builds trust and accelerates acceptance.
5
Acceptance
Polish metadata: titles, abstracts, and captions that mirror search language engineers use. Prepare a short deployment guide for practitioner readers.
6
Post‑publication
Share a minimal working example and bill‑of‑materials. Offer configuration ranges and safety checks so teams can adopt with confidence.
Selecting a venue within computers in engineering and beyond
Choose the outlet that reaches the team who must trust your system. If fast diffusion matters, emphasize open access and artifact availability. For lasting citations, foreground methodological clarity, error analysis, and robust boundaries.
When in doubt, read recent issues and compare problem framing, datasets/hardware, and reviewer expectations. Align your narrative to the journal’s cadence so editors and reviewers can evaluate quickly.
FAQs for journal of electrical engineering and technology authors
How detailed should hardware and firmware notes be?
Include PCB revisions, BOM variants, firmware builds, and any calibration steps. Share tolerance windows and known failure modes so others can reproduce safely.
What level of stress testing is expected?
Cover thermal limits, duty cycles, load steps, EMI, and brownout behavior. Report variance with error bars and explain any instability windows.
Do I need to open source artifacts?
Where feasible, yes. If not, provide minimal surrogates: pseudocode, configs, and test harnesses. Document licenses for any third‑party assets.
How do I position cross‑disciplinary work?
Clarify the interface—where power, control, and compute meet—and quantify the benefit for each side. Use language familiar to all sub‑audiences.
Ready to submit to the journal of electrical engineering and technology community at IJCSE?
We invite robust, transparent work that advances reliability, efficiency, and safety. Whether your results live in power converters, real‑time controllers, or industrial networks, our editors will partner with you to publish clearly, quickly, and ethically.
